Pentacene organic transistors and ring oscillators on glass and on flexible polymeric substrates

APPLIED PHYSICS LETTERS
VOLUME 82, NUMBER 23
9 JUNE 2003
Pentacene organic transistors and ring oscillators on glass and on flexible
polymeric substrates
Hagen Klauk,a) Marcus Halik, Ute Zschieschang, Florian Eder, Gu¨nter Schmid,
and Christine Dehm
Polymer Materials and Technology, Infineon Technologies, Paul-Gossen-Str. 100, 91052 Erlangen, Germany
Received 24 February 2003; accepted 1 April 2003
We have fabricated organic thin film transistors, inverters, and ring oscillators on glass and on
flexible polyethylene naphthalate, using the small-molecule hydrocarbon pentacene as the
semiconductor and solution-processed polyvinylphenol as the gate dielectric. Depending on the
choice of substrate, the transistors have a carrier mobility between 0.3 and 0.7 cm2/V s, an on/off
current ratio between 105 and 106, and a subthreshold swing between 0.9 and 1.6 V/decade. To
account for the positive switch-on voltage of the transistors, circuits were designed to operate with
integrated level shifting. Depending on the type of substrate, ring oscillators have a signal
propagation delay as low as 15
s per stage. © 2003 American Institute of Physics.
DOI: 10.1063/1.1579870
Organic thin film transistors TFTs hold great promise
with an accuracy of better than 5
m over areas larger than
for a variety of electronic applications, including information
10 cm2, corresponding to a dimensional distortion of less
displays,1–3 chemical sensors,4–6 electronic paper,7 and low-
than 0.02%. The key to securing a sufficient dimensional
cost microelectronics.8–19 A key advantage of organic TFTs
stability is the thermal treatment of the PEN prior to device
over transistors based on inorganic semiconductors is the re-
processing. We usually heat the PEN to 200 °C with a rate of
duced thermal budget during device processing, which often
3° per minute, then allow the PEN to cool to room tempera-
allows the use of light-weight, flexible polymeric substrates.
ture at about 1° per minute. For comparison, we have also
We have recently developed a process for the fabrication of
fabricated TFTs on PEN not heated prior to processing, and
organic TFTs based on the small-molecule hydrocarbon pen-
observed dimensional distortions greater than 0.5% after
tacene, using solution-processed polyvinylphenol as the gate
completing devices.
dielectric.20–22 Here we report on pentacene TFTs and inte-
All devices and circuits are characterized in ambient air.
grated circuits with good static and dynamic performance on
Figure 2 shows the electrical characteristics of a pentacene
glass and on flexible polymeric substrates.
TFT on glass. The transistor has a gate dielectric thickness of
Figure 1 shows the schematic cross section of our pen-
120 nm. From the transfer characteristics, a saturation mo-
tacene TFTs. Device processing starts with a clean sodalime
bility of 0.7 cm2/V s, an on/off current ratio of 105, a sub-
glass wafer, or with 125- m-thick polyethylene naphthalate
threshold swing of 0.9 V/decade, and a switch-on voltage of
PEN film. Prior to device processing, the PEN is preshrunk
4 V are extracted. Figure 3 shows the characteristics of a
at a temperature of 200 °C in a vacuum oven to improve its
TFT on flexible PEN, with a gate dielectric thickness of 270
dimensional stability. To define the gate electrodes and the
nm, a saturation mobility of 0.3 cm2/V s, an on/off current
first interconnect layer, a 30-nm thick titanium film is depos-
ratio of 106, a subthreshold swing of 1.6 V/decade, and a
ited by sputtering and patterned by photolithography and wet
switch-on voltage of 10 V. Following the analysis by Meijer
etching. For the gate dielectric layer, polyvinylphenol PVP
et al.23 we define the switch-on voltage as the gate-source
is mixed with poly melamine-co-formaldehyde methylated,
voltage at which the smallest drain current is measured.
deposited by spin coating, and crosslinked at 200 °C, making
Evident from Figs. 2 and 3 is a slight increase in sub-
the film robust against exposure to solvents, resist developer,
threshold swing and switch-on voltage for TFTs fabricated
and metal etchants. To create vias between the first and sec-
on PEN, rather than on glass. Compared with glass, PEN has
ond interconnect layers, the PVP is patterned by photolithog-
a somewhat larger surface roughness; atomic force micros-
raphy and oxygen plasma etching. To define the source and
copy measurements indicate an average surface roughness of
drain contacts and the second interconnect layer, 30 nm of
about 8 Å for glass and about 15 Å for PEN. Greater sub-
gold are deposited by evaporation and patterned by photoli-
strate roughness is likely to cause a greater density of trap
thography and wet etching. Pentacene is deposited by ther-
mal evaporation to create the organic active TFT layer, with
an average thickness of 30 nm.
PEN has a glass transition temperature of 120 °C. De-
spite the fact we heat the substrates to a temperature of
200 °C during the device process to crosslink the PVP , we
are able to align the via and contact levels to the gate level
FIG. 1. Schematic cross section a pentacene TFT, and photograph of a
a Electronic mail: Hagen.Klauk@infineon.com
flexible PEN substrate with pentacene TFTs and integrated circuits.
0003-6951/2003/82(23)/4175/3/$20.00
4175
© 2003 American Institute of Physics
Downloaded 03 Jun 2003 to 194.175.117.86. Redistribution subject to AIP license or copyright, see http://ojps.aip.org/aplo/aplcr.jsp

---

4176
Appl. Phys. Lett., Vol. 82, No. 23, 9 June 2003
Klauk et al.
FIG. 2. Electrical characteristics of a pentacene TFT on glass. The TFT has a gate dielectric thickness of 120 nm, a carrier mobility of 0.7 cm2/V s, a
subthreshold swing of 0.9 V/decade, and an on/off current ratio of 105.
FIG. 3. Electrical characteristics of a pentacene TFT on flexible PEN. The TFT has a gate dielectric thickness of 270 nm, a carrier mobility of 0.3 cm2/V s,
a subthreshold swing of 1.6 V/decade, and an on/off current ratio of 106.
FIG. 4. a Circuit schematic and electrical characteristics of a pentacene inverter with saturated load without level shifting . Due to the positive switch-on
voltage of the TFTs, the inverter does not show the correct logic function. b Circuit schematic and electrical characteristics of a pentacene inverter with
active load and integrated level shifting. The inverter has sufficiently large gain and matching input and output levels.
Downloaded 03 Jun 2003 to 194.175.117.86. Redistribution subject to AIP license or copyright, see http://ojps.aip.org/aplo/aplcr.jsp

---

Appl. Phys. Lett., Vol. 82, No. 23, 9 June 2003
Klauk et al.
4177
states
in
the
gate
dielectric
and
at
the
dielectric–
m is feasible on inexpensive polymeric substrates such as
semiconductor interface, which would explain the observed
PEN over areas larger than a few square centimeters, due to
increase in subthreshold swing and switch-on voltage.24,25
the limited dimensional stability of these materials under
Figure 4 a shows the schematic and the transfer charac-
thermal and mechanical stress. Polyimide has a greater di-
teristics of a pentacene inverter with saturated load. The in-
mensional stability, but is also more expensive than PEN and
verter has sufficiently large gain, but due to the positive
not as transparent and thus unsuited for liquid crystal dis-
switch-on voltage, the input and output levels do not match.
play applications, for example .
Also evident is a hysteresis of a few hundred millivolts in the
In summary, we have demonstrated pentacene organic
inverter characteristics, which is possibly due to mobile
TFTs and ring oscillators on glass and on flexible polymeric
charges in the gate dielectric. To allow circuits to operate
substrates and obtained devices with a carrier mobility as
over a wide voltage range, regardless of switch-on voltage
large as 0.7 cm2/V s and circuits with a signal propagation
and hysteresis, we have designed inverters with active load
delay as low as 15
s per stage, measured using ring oscil-
and integrated level shifting. Figure 4 b shows the sche-
lators with integrated level shifting.
matic and the transfer characteristics of a pentacene inverter
1
with active load and level-shifting. The inverter has a gain of
P. Mach, S. J. Rodriguez, R. Nortrup, P. Wiltzius, and J. A. Rogers, Appl.
Phys. Lett. 78, 3592 2001 .
12 and matching input and output levels, despite positive
2 C. D. Sheraw, L. Zhou, J. R. Huang, D. J. Gundlach, T. N. Jackson, M. G.
switch-on voltage and slight hysteresis. Over a certain range
Kane, I. G. Hill, M. S. Hammond, J. Campi, B. K. Greening, J. Francl, and
of operating voltages, V
J. West, Appl. Phys. Lett. 80, 1088 2002 .
GG can be pulled to ground ( V GG
3
0), thus limiting the number of additional power supplies
H. E. A. Huitema, G. H. Gelinck, J. B. P. H. van der Putten, K. E. Kuijk,
K. M. Hart, E. Cantatore, and D. M. de Leeuw, Adv. Mater. Weinheim,
to one (VSS) without affecting circuit performance.
Ger. 14, 1201 2002 .
Based on inverters with active load and integrated level
4 B. Crone, A. Dodabalapur, A. Gelperin, L. Torsi, H. E. Katz, A. J. Lov-
shifting we have fabricated five-stage pentacene ring oscilla-
inger, and Z. Bao, Appl. Phys. Lett. 78, 2229 2001 .
5 B. Crone, A. Dodabalapur, R. Sarpeshkar, A. Gelperin, H. E. Katz, and Z.
tors. These circuits were laid out using a 5
m design rule,
Bao, J. Appl. Phys. 91, 10140 2002 .
so that TFTs have a channel length of 5
m and a contact
6 C. Bartic, B. Palan, A. Campitelli, and G. Borghs, Sens. Actuators B 83,
overlap of 5
m. Each ring oscillator occupies an area of
115 2002 .
7
0.6 mm2. The fastest ring oscillators we have obtained on
J. A. Rogers, Z. Bao, K. Baldwin, A. Dodabalapur, B. Crone, V. R. Raju,
V. Kuck, H. Katz, K. Amundson, J. Ewing, and P. Drzaic, Proc. Natl.
glass substrates have a signal propagation delay of 15
s per
Acad. Sci. U.S.A. 98, 4835 2001 .
stage, when operated with a supply voltage of 50 V. On PEN
8 A. R. Brown, A. Pomp, C. M. Hart, and D. M. de Leeuw, Science Wash-
substrates we have measured a signal delay of 22
s per
ington, DC, U.S. 270, 972 1995 .
9
stage. Our pentacene ring oscillators usually operate for sev-
C. J. Drury, C. M. J. Mutsaers, C. M. Hart, M. Matters, and D. M. de
Leeuw, Appl. Phys. Lett. 73, 108 1998 .
eral hours in ambient air before the oscillation ceases due to
10 H. Klauk, D. J. Gundlach, and T. N. Jackson, IEEE Electron Device Lett.
shifts in threshold voltage. After adjusting the supply volt-
20, 289 1999 .
ages, the circuits usually resume operation. Simulations in-
11 Y. Y. Lin, A. Dodabalapur, R. Sarpeshkar, Z. Bao, W. Li, K. Baldwin, V. R.
dicate that the level-shift stage accounts for an increase in
Raju, and H. E. Katz, Appl. Phys. Lett. 74, 2714 1999 .
12 G. H. Gelinck, T. C. T. Geuns, and D. M. de Leeuw, Appl. Phys. Lett. 77,
signal delay of about 20%–50% compared with circuits that
1487 2000 .
do not require level shifting assuming similar mobility and
13 M. G. Kane, J. Campi, M. S. Hammond, F. P. Cuomo, B. Greening, C. D.
TFT design .25
Sheraw, J. A. Nichols, D. J. Gundlach, J. R. Huang, C. C. Kuo, L. Jia, H.
Several groups have reported faster organic ring oscilla-
Klauk, and T. N. Jackson, IEEE Electron Device Lett. 21, 534 2000 .
14 H. Sirringhaus, T. Kawase, R. H. Friend, T. Shimoda, M. Inbasekaran, W.
tors. For example, Crone et al. have demonstrated comple-
Wu, and E. P. Woo, Science Washington, DC, U.S. 290, 2123 2000 .
mentary
ring
oscillators
on
silicon
substrates,
based
15 B. K. Crone, A. Dodabalapur, R. Sarpeshkar, R. W. Filas, Y. Y. Lin, Z.
on inorganic-gate-dielectric TFTs with a mobility of
Bao, J. H. O’Neill, W. Li, and H. E. Katz, J. Appl. Phys. 89, 5125 2001 .
16 D. J. Gundlach, L. Zhou, J. A. Nichols, J. R. Huang, and T. N. Jackson,
0.02 cm2/V s and a channel length of 7.5
m, and operating
2001 Int. Electr. Dev. Meet. Techn. Dig., 2001, p. 731.
with a signal delay of 10
s at a supply voltage of 100 V.15
17 W. Fix, A. Ullmann, J. Ficker, and W. Clemens, Appl. Phys. Lett. 81, 1735
Fix et al. have reported ring oscillators on polyester sub-
2002 .
18
strates with a channel length of 2
m and a signal delay of
F. J. Touwslager, N. P. Willard, and D. M. de Leeuw, Appl. Phys. Lett. 81,
4556 2002 .
0.68
s at 80 V, based on polymer TFTs with a mobility of
19 D. M. de Leeuw, G. H. Gelinck, T. C. T. Geuns, E. van Veenendaal, E.
0.03 cm2/V s.17 Finally, deLeeuw et al. have shown ring os-
Cantatore, and B. H. Huisman, 2002 Int. Electr. Dev. Meet. Techn. Dig.,
cillators on polyimide substrates with a signal delay of 5.5
2002, p. 293.
20
s, based on pentacene TFTs with a mobility around
M. Halik, H. Klauk, U. Zschieschang, T. Kriem, G. Schmid, W. Radlik,
and K. Wussow, Appl. Phys. Lett. 81, 289 2002 .
0.05 cm2/V s and a channel length of 0.75
m.19 The analy-
21 H. Klauk, M. Halik, U. Zschieschang, G. Schmid, W. Radlik, and W.
sis by deLeeuw et al. shows that the signal delay depends
Weber, J. Appl. Phys. 92, 5259 2002 .
critically on the channel length, and the authors reported that
22 M. Halik, H. Klauk, U. Zschieschang, G. Schmid, W. Radlik, and W.
ring oscillators fabricated with a design rule of 5
m have a
Weber, Adv. Mater. Weinheim, Ger. 14, 1717 2002 .
23 E. J. Meijer, C. Tanase, P. W. M. Blom, E. van Veenendaal, B. H. Huis-
much more modest signal delay of 1.2 ms.
man, D. M. de Leeuw, and T. M. Klapwijk, Appl. Phys. Lett. 80, 3838
Thanks to a significantly larger carrier mobility see
2002 .
Figs. 2 and 3 , our ring oscillators operate with a signal delay
24 S. Scheinert, G. Paasch, M. Schro¨dner, H. K. Roth, S. Sensfuß, and T.
of 15
s per stage on glass and 22
s per stage on PEN, even
Doll, J. Appl. Phys. 92, 330 2002 .
25 R. Brederlow, S. Briole, H. Klauk, M. Halik, U. Zschieschang, G. Schmid,
when a relaxed design rule of 5
m is used. This is important
J. M. Gorriz-Saez, C. Pacha, R. Thewes, and W. Weber, 2003 IEEE Int.
since it is unclear if a design rule substantially smaller than 5
Solid-State Circuits Conf. Techn. Dig., 2003, p. 378.
Downloaded 03 Jun 2003 to 194.175.117.86. Redistribution subject to AIP license or copyright, see http://ojps.aip.org/aplo/aplcr.jsp

---